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・ Intel Clear Video
・ Intel Cluster Ready
・ Intel Communication Streaming Architecture
・ Intel Compute Stick
・ Intel Core
・ Intel Core (microarchitecture)
・ Intel Core 2
・ Intel Corp. v. Advanced Micro Devices, Inc.
・ Intel Corp. v. Hamidi
・ Intel Corporation Inc. v. CPM United Kingdom Ltd
・ Intel Ct
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・ Intel Developer Forum
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・ Intel Display Power Saving Technology
Intel DX4
・ Intel Dynamic Acceleration
・ Intel Edison
・ Intel Extreme Masters
・ Intel Extreme Masters Season IX
・ Intel Extreme Masters Season X - San Jose
・ Intel Fortran Compiler
・ Intel Foundation Achievement Award
・ Intel Galileo
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・ Intel graphics
・ Intel HD and Iris Graphics
・ Intel HEX
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Intel DX4 : ウィキペディア英語版
Intel DX4

The IntelDX4 is a clock-tripled i486 microprocessor with 16 kB L1 cache. Intel named it DX4 (rather than ''DX3'') as a consequence of litigation with AMD over trademarks. The product was officially named the IntelDX4, but OEMs continued using the i486 naming convention.
Intel produced IntelDX4s with two clock speed steppings: A 75 MHz version (3× 25 MHz multiplier), and a 100 MHz version (usually 3× 33.3 MHz, but sometimes also 2× 50 MHz). Both chips were released in March 1994. A version of the IntelDX4 featuring write-back cache was released in October 1994. The original write-through versions of the chip are marked with a laser embossed "&E", while the write-back enabled versions are marked "&EW". i486 OverDrive editions of the IntelDX4 had locked multipliers, and therefore can only run at 3× the external clock-speed. The 100 MHz model of the processor had an iCOMP rating of 435, while the 75 MHz processor had a rating of 319. The IntelDX4 was an OEM-only product, but the DX4 Overdrive could be purchased at a retail store.
The IntelDX4 microprocessor is mostly pin-compatible with the 80486, but requires a lower 3.3V supply. Normal 80486 and DX2 processors use a 5V supply; plugging a DX4 into an unmodified socket will destroy it. Motherboards lacking support for the 3.3V CPUs can sometimes make use of them using a voltage regulator (VRM) that fits between the socket and the CPU.
==S-Specs==


抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)
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